International Journal of LNCT

ISSN (Online):2456-9895



Volume-4 Issue-19 August-2020

[1] A Review Paper on Image Classification for CIFAR-10 Dataset  

Suyesh Pandit & Sushil Kumar

In recent year, with the speedy development in the digital contents identification, automatic classification of the images became most challenging task in the fields of computer vision. Automatic understanding and analysing of images by system is difficult as compared to human visions. Several research have been done to overcome problem in existing classification system, but the output was narrowed only to low level image primitives. However, those approach lack with accurate classification of images. In this paper, we propose uses deep learning algorithm to achieve the expected results in the area like computer visions. Our system present Convolutional Neural Network (CNN), a machine learning algorithm being used for automatic classification the images. Image classification requires the generation of features capable of detecting image patterns informative of group identity. The objective of this study was to classify images from the public CIFAR10 image dataset by leveraging combinations of disparate image feature sources from deep learning approaches.


Rajesh Kumar, Dr. Manish Shrivastava & Sushil Kumar

 Today when the internet technology is growing rapidly so, there is a need to store and process huge volume of data. The growing technology is generated data from which only 20% of data is in structured form and the remaining 80% of data is in unstructured form which is known as a big data problem. So there is a need of technology that can manage the big data efficiently. The Apache Hadoop is a framework that allows for the distributed processing of large data sets across machines. The Hadoop having two modules 1. Hadoop distributed file system and 2. Map Reduce. By using the hive query language on the Hadoop and increasing number of nodes the data will be processed fastest than with the fewer nodes. In this we explore MapReduce Join operation is used to combine two large datasets. Joining two datasets begins by comparing the size of each dataset. If one dataset is smaller as compared to the other dataset then either Mapper uses the smaller dataset to perform a lookup by Reducer for matching records from the large dataset and then combine those records to form output records. In this paper, we proposed a distributed cache , so the smaller dataset is stored into cache memory of every mapper node and all the lookups are perform by mapper to produce a final records. So by using distributed cache we don't use reducer means data load will be managed efficiently at mapper ends which produces a overall better performance as compared to normal join.  


Satya, Rajkumar Sharma & Sushil Kumar

In this BigData era processing and analyzing the data is very important and tedious job. An open source framework called Hadoop, implementation of MapReduce provides efficient platform for BigData analytics. Hadoop MapReduce is a framework for distributed storage and processing of large datasets that is quite popular in big data analytics. It has various configuration which play an important role in deciding the performance i.e., the execution time of a given big data processing job. Default values of these configuration do not always result in good performance and hence it is important to tune them. Tuning the job configuration parameters is an effective way to improve performance so that we can reduce the execution time and the disk utilization. In this paper we are discussing the tuning the mapreduce job configuration using keep the data into buffer and clean the buffer after the jobs gets completed which enhance the performance of MapReduce jobs. In this we can reduce the intermediate data by keeping the intermediate data at the mapper end and perform computation in that buffer will reduce the intermediate data which will than moves towards reducer and produce a final output.


Rohit Singh, Dr. Shailendra Kumar Dwivedi and Jitendra Raghuvanshi

In order to raise thermal efficiency of a gas turbine, higher turbine inlet temperature (TIT) is needed. However, higher TIT increases thermal load to its hotsection components and reducing their life span. Therefore, very complicated cooling technology such as film cooling and internal cooling is required especially for HP turbine blades. In film cooling, relatively cool air is injected onto the blade surface to form a protective layer between the surface and hot mainstream gas. Film cooling is one of the cooling systems investigated for the application to gas turbine blades. Gas turbines use film cooling in addition to turbulated internal cooling to protect the blades outer surface from hot gases. The present study concentrates on the numerical investigation of film cooling performance for a trenched shape hole in a modern turbine blade. The adiabatic film effectiveness and the heat transfer coefficient are determined numerically on a flat plate downstream of a single hole of inclined different blowing ratio cases by Computational Fluid Dynamics (CFD) analyses. The focus of this investigation is to investigate advanced cooling hole geometry on film cooling heat transfer and cooling effectiveness over flat and turbine airfoil surfaces. In the present study, only inflow flow parameters are varied at a time, which leads to four different cases to achieve the desired blowing ratio (BLR). The geometry with trenched hole configuration has to be analysed for the different blowing ratios (0.5, 0.7, 1.0 and 1.5). The study is carried out for four cases using inlet and outlet boundary conditions. These cases are mainly divided into Case 1, Case 2, Case 3 and Case 4. Unstructured (tetrahedral) mesh is used with layers of prism and mesh is of ~4.5M elements. The present study flow field is solved by using k-omega turbulence model (Reynolds stress transport model) for simulation of turbulent flows in film cooling and the simulation is run using ANSYS FLUENT 13.0 computer code.

[5] VLSI Architecture for Digital IF Filter with Low Complexity using Multirate Approach

Shaziya Fatima & Dr. Shravan Sable

Because of restricted recurrence assets, new administrations are being applied to the current frequencies, and specialist co-ops are apportioning a portion of the current frequencies for recently improved versatile interchanges. In light of this recurrence condition, repeater and base station frameworks for portable correspondences are getting more confused, and recurrence obstruction brought about by numerous groups and administrations is deteriorating. In this manner, a heterodyne recipient utilizing IF channels with high selectivity has been utilized to limit the obstruction between frequencies. Notwithstanding, repeater and base station frameworks in portable interchanges utilizing fixed IF channels can't effectively adapt to the use of different recurrence groups, the use of different administrations, and recurrence reusing. In this paper design digital IF filter using multi-rate approach. Multirate approach is reduced the hardware complexity is reduce in the way of adder and multiplier. Digital IF is implemented Xilinx software and simulate different parameter i.e. slice, LUTs, minimum frequency and delay.

[6]  Synthesis of CNFET based Multiplexer using Ternary Logic Circuits

Md. Iftakhar Ali Khan & Dr. Soheb Munir

Multi-Valued Logic (MVL) circuits have attracted the attention in recent times because of the advantages they offer in reducing the interconnect complexity and increasing the information content per unit area. Ternary Logic is a special case of MVL that has three logic levels. Implementation of voltage mode ternary logic circuits requires transistors with different threshold voltages. Carbon-Nanotube (CNT) is used as a conduction channel in CNFET and variations of the diameter of CNT results in variation in threshold voltage of CNFET. This property of CNFET makes it suitable for implementation of MVL circuits in general and ternary logic circuits in particular. In this paper, implement 2:1 multiplexer and decoder using ternary logic circuit. This technique is used to synthesize a set of benchmark ternary functions and the resulting circuits are compared with circuits synthesized using existing techniques.


Sushant Ranjan & Jitendra Raghuvanshi

The solar cloth dryer was made in with the help of available materials. the efficiency was investigated with how to fast it was able to dry up the clothes .Hence a set of experiments were performed to determine the worthiness of this solar dryer .The experiments shows that the dryer work are fine as per its objectives. The main advantage of this dryer it can work in auxiliary heating system all-round the year with a built up .and there are no with moving parts, a conventional dryer in washing machine it consumes less power than conventional dryers .It can easily be built with commonly available materials. The manuscripts re-present the design and efficient energy construction, time saving, effective cost of passive solar power cloth dryer. a derivation of mathematical model are represent the analysis of the elements necessary for successfully design for various component of solar cloth dryer. the solar drying performed an average drying rate of 0.35kg/h and drying time of 3 h in a mill day, since under low ambient humidity approximately 35%.the efficiency are improved in solar dryer uses Nano coating technology. additionally, the computational liquid element (CFD) are the transient warm conduct in light of Navies-strokes with mathematically statement are utilized that shoe that overarching temperature in the sun based ventilation are connected with the interior warmer flux because of sun radiation dampness evacuation. For this frame work outcome demonstrated great assertion between the computational reproductions and tested are effective results are showed incredible assertion between effective computational solid multiplication and effective test are procedure from these systems.